Projects:
1. Deformation Characteristics of Flip Chips Due to Thermal Cycling
2. Thermal Resistance of Interface Materials for Electronic Applications
Duration: 2001 – 2003 – INTEL Collaboration
Role: Project Leader
3. Studies of Thermal Shock Stress to Electronic Packaging Failures
Duration: 2003-2005 – INTEL Fellowship Grant
Role: Project Leader – Fellowship Project Supervisor
4. Methodology for Assessment of Plastic/Organic Package Failure Under
Thermo-mechanical Loading Conditions
Duration: 2003-2005 – INTEL Research Grant
Role: Project Leader
5. Low CTE Substrate to Improve Warp and Solder Joint Reliability
(Intel-UTM-USM collaboration)
Duration: 2003-2005 – INTEL Research Grant
Role: Project Leader
6. Predictive Methodology for Crack Initiation and Propagation in Interconnect
Materials
Duration: 2005-2007 – INTEL Research Grant
Role: Project Leader
7. A New Technique for Predicting Damage in Advanced Interconnect Materials for Microelectronic Applications
Duration: 2007-2009 – eScienceFund
Role: Project Leader 4
8. Evaluation of Fracture Mechanics-based Model for Lead-free Solder
Interconnects
Duration: 2007-2009 – INTEL Research Grant
Role: Project Leader
9. Microstructure-Based Cohesive Damage Model for Fatigue of Solder
Interconnects
Duration: 2009-2011 – INTEL Research Grant
Role: Project Leader
10. Simulation of Low Cycle Fatigue Behavior of Pb-free Solder Interconnects
using Cohesive Zone Model
Duration: 2009-2011 – INTEL Fellowship Grant
Role: Project Leader – Fellowship Project Supervisor
11. Temperature and Rate Dependent Parameters for Damage-based Fatigue
Models of Pb-free Solders
Duration: 2011-2013 – INTEL Innovation Grant (on-going)
Role: Project Leader